1. Field of the Invention
The invention relates to the field of passive voltage dividers for MOS integrated circuits.
2. Prior Art
In some metal-oxide-semiconductor (MOS) integrated circuits a higher potential than the normal power supply potential (e.g., 5 volts) is required. This higher potential may be generated on-chip using charge pumping circuits. On-chip regulation of this higher potential is difficult, particularly if power dissipation is to minimized. The higher potential, for instance, is required for the programming and erasing of electrically programmable and electrically erasable memory (E.sup.2) cells employing floating gates. Such cells are described in U.S. Pat. No. 4,203,158. (A circuit for switching of these higher voltages is described in copending application, Ser. No. 339,790 filed Jan. 14, 1982, entitled "MOS HIGH VOLTAGE SWITCHING CIRCUIT", which is assigned to the assignee of the present invention now U.S. Pat. No. 4,451,748.) To reduce wear-out of junctions in E.sup.2 cells, particularly those employing thin oxides, the higher potential should be regulated (e.g., 21 volts).
Enhancement mode devices can be used to regulate this higher potential where these devices are connected in a diode-like configuration. While this circuit provides good power conservation, it is not temperature stable. Another known circuit for providing regulation employs the grounded gate breakdown potential of diffusions in MOS devices. This circuit is not temperature stable and is very process dependent. In still another circuit for regulating the higher potential a feedback loop is used. As will be seen, the voltage divider of the present invention is employed in a feedback loop and is used to control the higher programming potential for E.sup.2 memory cells.
There are many prior art MOS circuits used for voltage division. Most typically, the circuits employ series coupled transistors or resistors fabricated, for instance, from diffused regions. These circuits consume too much power to be useful in some applications such as the application described in this patent, in other cases these prior art circuits cannot handle a high potential (e.g., 21 volts).